delayer

英[dɪ\'leɪə]

美[dɪ\'leɪə]

基本释义

Switched capacitor ( SC ) unit delayer , positive negative proportors and adder were designed using two phase clocks.

用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器、负比例器和加法器.

互联网

Final, improve of beam - pointing drift with digital delayer at elements or sub - arrays is given.

文章也给出了阵列单元或子阵设置数字延迟器后, 扫描波束指向漂移改善的分析结果.

互联网

Noun